Today PEZY Computing is introducing a new MIPS64-based PEZY-SC2 family of many-core chips for supercomputers and HPC applications that will scale up to 4096 processing nodes. The 64-bit MIPS CPUs will act as the host processors for the system, making PEZY-SC2 the first generation of 64-bit HPC processors from the Japanese company.
PEZY is a fabless startup focusing on compute-intensive, highly parallel applications. The company already occupies the top three spots on the Green500 list of energy-efficient HPC makers, setting a world record with the Shoubo supercomputer that consumes only 7W per GFLOPS.
Founder and CEO Motoaki Saito named PEZY by combining the initials of four decimal unit prefixes: peta, exa, zeta and yotta. For reference, 1 petaFLOPS represents one thousand teraFLOPS (i.e. 1,000 trillion); exa, zetta and yotta are 1000 times the value of the former unit, respectively.
You can find out more details from the blog article below:
The MIPS architecture provides many great features for HPC applications, including hardware multithreading (up to four threads per CPU), 128-bit SIMD, and full hardware virtualization (up to 255 guest operating systems). For example, hardware multithreading is very important since many-core chips prefer to use in-order execution cores and rely on multithreading to avoid stalling.
MIPS has a rich history in HPC applications. Initially used in multiple SGI workstations and desktop computers in the late 1990s and early 2000s, 64-bit MIPS CPUs were later deployed inside several high-profile supercomputers, including the Cenju-4 parallel machine designed by NEC Corp or the SiCortex SC5832 supercomputer.