The management of Western Digital Corporation (WD) recently took part in a Bank of America Merrill Lynch 2021 Global Technology Conference Call. During the call, Wamsi Mohan a senior equity research analyst from the BoA, quizzed both Siva Sivaram (WD President), and Robert Eulau (WD EVP & CFO) about WD's current and future business. One of the more interesting topics touched upon during the call, documented by Seeking Alpha, was talk about SSDs moving to using PLC (Penta-Level Cell, five bits per cell) flash NAND for data storage.
As Computer Base reports, flash partners Kioxia and WD already announced work on PLC back at the Flash Memory Summit 2019. However, it still seems like the technology won't be mainstream for at least half a decade. Behind this decision is the knowledge that to move from QLC to PLC gains just 25 per cent storage per cell and "To get that gain you're sacrificing a lot, you need additional redundancy, additional ECC," noted Sivaram, WD President, "so the net gain opposed to the performance loss may not be quite as desirable".
ComputerBase takes the visual chart from WD and helpfully puts a number on the trailing wiggly line – for its relatively small potential increase in storage, a PLC controller must be able to read/write 32 voltage states per cell. This is a much more complex / exacting task for controllers to do. You can see as the bits per cell increase linearly, the states per cell increases exponentially – which is a technical challenge.
Current QLC technology drives are already looked down upon by enthusiasts, and even those with SLC cache buffers are commonly seen to suffer when that cache is filled/overladen. Remember, as QLC is typically a cost saving option, product designers will have to minimise product caches.
Intel was previously confident that its floating gate PLC NAND would be better suited to the job than rival charge trap technology, but it subsequently sold its NAND division to SK hynix. We don't have any updates on SK hynix PLC developments at this time.
