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AMD looks to standardise sockets after AM3+ and FM2

by Alistair Lowe on 28 September 2012, 11:15


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It's now known that AMD's upcoming Vishera Piledriver cores will continue to use the firm's AM3+ socket, with early confirmation perhaps showing up when companies such as ASUS began to announce refreshes to their AM3+ product line-up.

What wasn't known up until recently, however, was that AMD intends to stick by the AM3+ socket for at least one more major processor iteration, which is highly likely to be Steamroller. One of the compelling reasons to stand by AMD is typically cost, knowing that an investment in an AM3+ motherboard will most likely survive an extra processor generation is a compelling cash saver and, in fact, a portion of users running AMD computers are likely to already have AM3+ motherboards, as the socket has been available since mid-2011.

AMD AM3+ socket

AMD's new Trinity APU processors will require new socket, FM2, however, despite the release of FM1 only one year ago. Granting the firm some leg room, the APU is a younger, faster-evolving market and it's not unreasonable to expect a rapid evolution of standards and hardware. Certainly though, AMD appears to be working towards something with its sockets and has confirmed its intent to provide a unified socket and platform when it next introduces a new standard.

We wonder if AMD will chose to support the newly ratified DDR4 in future platforms, or if the firm will be looking to solutions, a little bit cooler and more exotic.

HEXUS Forums :: 13 Comments

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Good, unlike that other chip maker who has gone though three, soon to be four, totally incompatible sockets in 4 years.
Wow…awesome news. Thought the FX-6100s I just popped into my esx hosts would be their last upgrades….now it's all the way to steamroller :)
Good news on one hand, but will the AM3+ be holding back progress.
Don't think so - there's a bit of discussion on that front over in the Piledriver chat thread:

Given this should only be another couple of years I reckon the old HT bus will hold up until they integrate the northbridge completely, then probably we'll be looking at DDR4 as part of the HSA … and the world will be a very different place :O_o1:
I'm still dreaming of FPGA and modular CPU sockets using some sort of height and colour-coded adapters for power and I/O connectivity needs of any future processors using more or less the same instructions sets. It might not make sense, however my dreams are annoyingly persistent. Can it be done in the same manner as selecting different code paths in computer programming, or would it end up being too elaborate and costly to implement?