Technical collaborators Intel and Micron have announced the production and availability of 3D memory chips. These chips represent the world's highest-density flash memory and are now being sampled by manufacturers.
As planar NAND nears its scalability limits Intel and Micron have developed this 3D NAND technology which "stacks layers of data storage cells vertically with extraordinary precision to create storage devices with three times higher capacity than competing NAND technologies". The shrinking of these memory chips brings increased storage capacities to smaller spaces, better performance and lower power usage. It is envisaged that a broad range of devices, from mobile to enterprise, will benefit from this technology in the future.
Brian Shirley, vice president of Memory Technology and Solutions at Micron Technology, said "This 3D NAND technology has the potential to create fundamental market shifts. The depth of the impact that flash has had to date—from smartphones to flash-optimized supercomputing—is really just scratching the surface of what's possible." Intel's Rob Crooke, senior vice president and general manager, Non-Volatile Memory Solutions Group added that the innovation will "accelerate solid-state storage in computing platforms".
Looking at more technical details of the joint achievement, Intel says that the new memory cells are the first to use a floating gate cell to bring better performance, and to increase quality and reliability. We are told that 32 layers of cells are stacked vertically to create 256Gb multilevel cells (MLC) and 384Gb triple-level cells (TLC) which fit inside standard chip packages.
The result of this memory cell miniaturisation is that manufacturers will be able to produce gum stick-sized SSDs with greater than 3.5TB of storage and standard 2.5-inch SSDs with greater than 10TB of storage. Performance and endurance is improved as individual cell dimensions can be considerably larger thanks to the 3D stacking.
Other bonuses to end users of 3D NAND equipped devices are a reduced cost per GB of built-in storage, new sleep modes that can cut power to inactive NAND - even when chips in the same package are active - and improved bandwidth, I/O speeds and latency stats.
Intel says that the 256Gb multilevel cells (MLC) are sampling with partners right now with the 384Gb triple-level cells (TLC) memory due to be in partner labs by spring. Full scale production is expected for Q4 2015 with the resulting NAND expected to crop up in SSDs in early 2016.
Toshiba 3D Flash memory
In related news Toshiba announced the world's first 48-layer three dimensional stacked cell structure flash memory called BiCS yesterday. It also started shipping sample chips, however mass production of these Toshiba cells isn't expected to begin until H1 2016.