facebook rss twitter

Intel details microarchitecture of its new Xeon Phi processors

by Mark Tyson on 24 June 2014, 11:01

Tags: Intel (NASDAQ:INTC)

Quick Link: HEXUS.net/qacfxn

Add to My Vault: x

Please log in to view Printer Friendly Layout

Intel is at the International Supercomputing Conference in Leipzig and made use of the occasion to announce its Next-Generation Xeon Phi Processor with Integrated Intel Omni Scale Fabric.

The Xeon Phi many-core processor, code named 'Knight's Landing', includes a new interconnect technology which eliminates some troublesome bottlenecks which were hindering the progress to the goal of exascale computing. The 'fabric' within the chip helps address the memory and I/O performance challenges which face the world of high-performance computing (HPC).

Unlike its predecessor Knights Landing will be available as a standalone processor directly on a motherboard. This helps remove the PCI-e "programming complexities and bandwidth bottlenecks". The chip will also include up to 16GB of high-bandwidth, on-package memory at launch, said to deliver "five times better bandwidth compared to DDR4 memory, five times better energy efficiency and three times more density than current GDDR-based memory". Intel will also be supplying the Knights Landing and Intel Omni Scale Fabric controllers as PCIe-based add-on cards for system makers who prefer.

The current generation of Intel Xeon processors and Intel Xeon Phi coprocessors power the top-rated system in the world, the 'Milky Way 2' in China. The new Knights Landing and Omni Scale Fabric should help push things further. The three trillion double precision floating point operations per second (3 teraflops) in a single processor socket provided by the next generation Xeon Phi is complemented by it offering three times the single threaded performance of the current generation.

Intel says that a Knight's Landing processor is powered by more than 60 HPC-enhanced Silvermont architecture-based cores. Used as a standalone processor it will support DDR4 system memory. Due to its motherboard socketed form factor option it is expected to be used more broadly than its predecessor was, in workstations for example.

Expect to see Knight's Landing in HPC systems from H2 2015.



HEXUS Forums :: 7 Comments

Login with Forum Account

Don't have an account? Register today!
3TFLOP in a year's time, double what you can get from an Nvidia Tesla today? I guess that isn't far off the mark then.

Didn't they say the last Phi was easy to program? My word this one must practically write the code itself if it is easier still ;)

Edit to add:

Not enough detail here to compare it to other chips/systems.

Power 8 looks like a mighty chip, but intended for general purpose so doesn't look as power efficient unless Intel are still having scaling difficulties.

Was looking for stats for the PS4 (because when the PS3 was new everyone liked comparing raw numbers to the inflated figures you got for Cell), but I can only see an overall “1.8 TFLOPS” figure so I have to assume that is only single precision if they aren't saying?
It is pretty easy to program for - It's based on the old P54C Pentium from waay back in the mists of the mid 90's.
The chip will also include up to 16GB of high-bandwidth, on-package memory at launch, said to deliver "five times better bandwidth compared to DDR4 memory, five times better energy efficiency and three times more density than current GDDR-based memory
zaph0d
It is pretty easy to program for - It's based on the old P54C Pentium from waay back in the mists of the mid 90's.

That kept being bandied about, but never made sense to me.

From what I can tell, they actually used a single issue 486 like core (far more sensible as 486 was 80% of the performance of P5 in far fewer transistors) with some tweaks to make it run all the instructions that the P54C could run.

The new one is an Atom, hence 3 times faster single thread.

That still glosses over a whole ton of details though, because in a beasie like this where the data will be more important than core programming.

lumireleon
The chip will also include up to 16GB of high-bandwidth, on-package memory at launch, said to deliver "five times better bandwidth compared to DDR4 memory, five times better energy efficiency and three times more density than current GDDR-based memory

If you want memory throughput, google for the IBM Power 8 chip.