More performance for divergent applications
With AI taking off, CPUs need to cope with higher amounts of ML workloads. The improvements to the NEON pipeline of the Cortex-A55, and the addition of new ML architectural instructions, mean that the Cortex-A55 is able to achieve significantly higher ML performance than the Cortex-A53. The recent announcement of the Compute Libraries, a collection of low-level software functions optimized for Cortex-A NEON and ARM Mali GPU IP, can also be applied to the Cortex-A55 to further boost its ML performance.
Safer autonomous systems with Cortex-A55
The Cortex-A55 also includes advanced Reliability, Availability and Serviceability (RAS) features that allow it to service a wide host of markets, such as infrastructure and automotive. For automotive, the level of safety has been extended in Cortex-A55. It offers optional ECC and parity on every level of cache memory, and supports data poisoning – a method of deferring detected, non-correctable errors for more resilient systems. It is also the first Cortex-A CPU to undergo a new design flow for systematic fault avoidance, making it suitable for ASIL D applications.
Advanced power management deeply embedded
Advanced power management features for increased power savings
The Cortex-A55 comes with many new power-optimization features, such as faster and more rapid hardware-controlled state transitions from ON to OFF. For heavy applications that require more memory, such as VR, the L3 cache is fully powered on. However, for light applications that are fully L1 and L2 resident, such as music playback, the L3 cache is powered off.
It is also now possible to create individual or groups of CPUs each on their own, independent voltage domain within a cluster. This has two main benefits: firstly, it provides designers with further levers in tuning their systems for best performance and power efficiency. It also means that DynamIQ systems will be more capable of closely matching a device’s varying thermal envelope, and therefore, extracting and sustaining maximum performance.
A new age for ARM big.LITTLE processing
Since big.LITTLE technology was introduced to the world in 2011, it has become a household name for heterogeneous processing: two out of every three Android ARMv8-based devices shipped today rely on big.LITTLE for power and performance optimization. DynamIQ big.LITTLE is the next generation of heterogeneous computing for systems built with DynamIQ technology.
DynamIQ enables a fully integrated solution with the Cortex-A75 ‘big’ and Cortex-A55 ‘LITTLE’ CPUs, physically located in a single CPU cluster. The Cortex-A75 CPU can be designed for higher frequencies compared to the Cortex-A73. Together, they deliver substantially greater peak performance, higher sustained performance and more intelligent capabilities, compared to previous generations of big.LITTLE.
Richer user experience with DynamIQ big.LITTLE
DynamIQ big.LITTLE delivers greater performance and intelligent capabilities at a lower cost. It introduces new heterogeneous CPU configurations, such as 1 x Cortex-A75 + 3 x Cortex-A55 (1b+3L) and 1 x Cortex-A75 + 7 x Cortex-A55 (1b+7L). These new configurations deliver more than 2x more single-thread performance at similar die area to quad- and octa-Cortex-A55 designs respectively.
Powering tomorrow’s always-on, always-connected, intelligent world
The Cortex-A55 boasts a monumental step-up in performance, power efficiency and scalability – all vitally important to sustained, immersive experiences. When combined with the flexibility of DynamIQ and the performance of the Cortex-A75, the Cortex-A55 offers unprecedented mid-range efficiency without compromising levels of performance needed for AI and ML workloads.
From the connected thermostat to the autonomous car, ML algorithms to enable intelligent machines that help us live better lives. You can trust that the DynamIQ-based Cortex-A55 processor will be at the heart of the intelligent devices of the future – maximizing both power and efficiency.