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Intel disclose technology breakthrough targeted at billion-transistor processor.

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INTEL RESEARCHERS DISCLOSE  PACKAGING
TECHNOLOGY BREAKTHROUGH TARGETED AT

BILLION-TRANSISTOR PROCESSORS




SANTA CLARA, Calif., October 8, 2001 - Intel Corporation today announced its

researchers have developed a new packaging technology that will help the

company build processors with more than one billion transistors and running

at about 20GHz in the next few years.  The technology, called "Bumpless

Build-Up Layer" or BBUL packaging, "grows" the package around ds
the

processor rather than manufacturing the processor die separately and later

bonding it to the package, as it is currently done in the industry.

BBUL packaging will allow faster performance, lower power consumption and

smaller overall processor size when compared with today's packaging

technologies.

"In order to deliver the applications made popular in science

fiction movies, we will need to create processors that are much more

powerful than those we have today," said Dr. Gerald Marcyk, director of

Intel's Components Research Lab.  "The development of BBUL technology
will

allow us to deliver the performance of billion-transistor processors to

computers users.  It is something today's packaging technology just can't

handle."

BBUL packaging is thinner and lighter than today's chip packaging options.

It can also support multiple chips in the same package.  The role of

packaging is to "house" the processor die, supply it with electricity
and be

the interface between the silicon and the rest of the computer system, while

protecting it from dirt and physical dangers.  Intel uses packaging

variations to help tailor its processors for specific applications - such as

using smaller, thinner packages for mobile PCs, or packages with built-in

reliability and manageability features for servers.  Packaging also plays a

key role in delivering processor performance, since it takes data into and

out of the silicon core at ever faster speeds. 

"If packaging technology does not keep up with the pace of silicon

development, it will become a limiter to processor performance," said

Marcyk.  "Putting fast silicon into slow packages would be analogous
to

putting a Formula One engine into a compact car and expecting it to run like

a race car."



Toward the billion-transistor processor

The first step in building high-density, super fast processors is the design

of very fast, very small transistors. Last June, Intel scientists unveiled

the world's fastest transistors, running at a blistering 1.5 Terahertz

(1,500 Gigahertz), and featuring structures as thin as three atomic layers.

The second step is the development of advanced lithography technology in

order to "print" those transistors on a sliver of silicon.  Intel
has been

leading the industry's effort to develop Extreme Ultra-Violet (EUV)

lithography, which will allow Intel to pack a billion transistors into a

single processor.  The third step is to develop a processor package that
can

handle the transistor density and speed of these future processors without

slowing them down.  This is the driving force behind BBUL technology

research.



BBUL packaging 

Today, silicon chips, such as the Intel PentiumĀ® 4 processor, are connected

to their packaging via tiny balls of solder called "bumps." These
bumps make

the electrical and mechanical connection between the package and the chip.

As the frequency in future processors increases exponentially, the

performance of the bumps, the thickness of the packaging, and the number of

connection points becomes a concern. 

BBUL packaging eliminates use of these solder bumps completely.  Instead of

attaching the silicon die to the package, the BBUL technique grows the

package around the silicon.  High-speed copper connections are used to

connect the die to the different layers of the package.  This approach

reduces the thickness of the processor package and enables the processor to

run at a lower voltage--both key features for small, battery-operated

devices, such as mobile PCs or handheld devices.

Using BBUL packaging, Intel could also create high performance multi-chip

processors, such as server processors with two silicon cores and other

supporting silicon chips embedded into one small, high-performance package.

BBUL packaging technology could also offer a simple method to develop a

"system-on-a-package" through the use of high-speed copper lines
directly

located above the different pieces of silicon.  This would allow designers

to more easily embed powerful computers into every day objects, such the

dashboard of a car.

Intel is targeting the implementation of BBUL as a packaging option between

2006 and 2007.

Intel Labs researchers will disclose the technical details of this

new packaging technology tomorrow at the Advanced Metallization Conference

in Montreal, Canada.

For more information on Intel packaging technology and other silicon

research, please visit Intel's Silicon Showcase at

www.intel.com/research/silicon.

Intel, the world's largest chip maker, is also a leading manufacturer of

computer, networking and communications products.  Additional information

about Intel is available at www.intel.com/pressroom.



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