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Samsung: 8nm LPP is now ready for production

by Mark Tyson on 19 October 2017, 10:01

Tags: Samsung (005935.KS)

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Samsung announced that its newest 8nm FinFET process technology, 8LPP (Low Power Plus), has been qualified and is ready for production. The refinement provides as much as a 10 per cent reduction in IC area compared to Samsung 10LPP thanks to the reduced metal pitch. Samsung expects the greatest benefits will be felt by consumers of mobile, cryptocurrency and network/server processors.

In a blog post published on the Samsung Global Newsroom site the tech giant wrote that 8LPP will be the most advanced and competitive process node before EUV (extreme ultra violet) is employed at 7nm. It will be quick to go into production, as a refinement of the existing and proven 10LPP technology.

Samsung is rather pleased that its 8LPP tech has become ready “three months ahead of schedule”. The news was welcomed by chipmakers such as Qualcomm, as it will improve product performance and scalability.

Later today, at the Samsung Foundry Forum Europe in Munich, Samsung will share even more process news concerning 8LPP availability and an update on its 7nm EUV development. Check back with the Samsung Newsroom for that info in a few hours.

Intel, GlobalFoundries and TSMC

While on the topic of semiconductor process progress, the EETimes has just published an article which sums up the state of play at Samsung rivals – Intel and GlobalFoundries. These firms will outline their 10nm and 7nm process nodes, respectively in December at the International Electron Devices Meeting (IEDM).

Intel’s 10nm node sports FinFETs with a 7nm fin width at a 34nm pitch, and a 46nm fin height, made using self-aligned quadruple patterning. GlobalFoundries will detail a 0.0269µm2 SRAM cell made in its 7nm FinFET process, capable of delivering 2.8x better routed logic density and more than 40 per cent more performance or 55 per cent lower power, compared to its 14nm products.

Turning to TSMC, previous reports provided an estimate of 7nm mass production to start in H1 2018. Furthermore, earlier this month, TSMC announced plans for a 3nm fab in Tainan County, Taiwan. The 3nm production facility is expected to be operational from 2022 onwards.

25GHz graphene circuits printed on paper

There was one more interesting news nugget in the EETimes report about the IEDM event a couple of months away. Researchers from the University of Texas “will discuss how they built a variety of two- and three-terminal graphene and MoS2 devices on paper”. These flexible electronics circuits achieved a record 25GHz cutoff frequency “and performance remained high even when the paper was rolled into a two-inch diameter roll,” says the report.

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Wow,Samsung got there first!!