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Intel Sapphire Rapids utillises tiled, modular SoC architecture

by Mark Tyson on 19 August 2021, 16:11

Tags: Intel (NASDAQ:INTC)

Quick Link: HEXUS.net/qaeqzk

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Sapphire Rapids, Intel's newest next-generation Scalable Xeon Processor, was featured at today's Intel Architecture day. To summarise the key attraction of the new processors, they are claimed to deliver the "biggest leap in data centre capabilities in over a decade". Have these arrived in the nick of time to prevent AMD eating Intel's lunch?

In the video below, hosted by Intel's Chief Architect of data centre products, Sailesh Kottapalli, you will hear an outline of the new processor family's capabilities, and the technology that enables them.

Central to the Sapphire Rapids proposition is that it delivers "substantial compute performance" advancements across dynamic and demanding data center segments like cloud, microservices and AI. The key new technologies at play here include new and expanded ISAs to increase the workloads that are increasingly important to Intel customers. Thus the following acceleration engines have been implemented:

  • Intel Accelerator Interfacing Architecture (AIA) for efficient dispatch, synchronization and signaling to accelerators and devices.
  • Intel Advanced Matrix Extensions (AMX) to massively speed up tensor processing at the heart of deep learning algorithms. In its own tests AMX was up to 7x faster than using Intel AVX-512 VNNI instructions.
  • Intel Data Streaming Accelerator (DSA) to offload the most common data movement tasks and minimize this common data centre bottleneck
  • Intel Quick Assist Accelerator for cryptography and data de/compression

In addition to the above, there are the big changes hinted at by our headline. Sapphire Rapids is a multi-tile design for increased scalability, but it still acts like a single CPU thanks to the use of a balanced and modular architecture. The multiple tiles of a Sapphire Rapids SoC, built with Intel 7 process technology with EMIB technology, feature Intel's new performance cores with acceleration engines, combined with key building blocks such as I/O IP, Memory IP. Additionally, you can see some I/O and memory/cache advancements of Sapphire Rapids highlighted in the slides below. Other key technologies delivered include; PCIe 5.0, CXL 1.1, DDR5 and HBM.

Rounding off its Sapphire Rapids presentation, Intel has some demos and benchmarks showing how much more muscular this processor family is in the emerging elastic computing model of microservices. It is claimed that microsevices will account for >80 per cent of new cloud-native and SaaS applications, and Intel says it will lead here in power, latency, and efficiency.



HEXUS Forums :: 6 Comments

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Have these arrived in the nick of time to prevent AMD eating Intel's lunch?

If it was against Milan, maybe. But these are pushed back to H1 2022 meaning they'll be competing with Genoa.

That and the purported ~1500mm^2 total die area is nuts for such a low amount of cores.
Hmm… maybe I'm missing something but isn't this just doing the same as AMD does with epyc…. the reason I say this is because according to Intel they just ‘glued together’ some desktop dies…. lol
LSG501
Hmm… maybe I'm missing something but isn't this just doing the same as AMD does with epyc…. the reason I say this is because according to Intel they just ‘glued together’ some desktop dies…. lol

Got the glue dig in there before me…
Better not be Super Glue then , every time I've tried it , it came unstuck.lol.
when will consumers see this technology in cpu's ?