Memory Tests
These graphs don't usually tend to offer great insight or illumination. But take another look at the memory write test, where the Cezanne chip almost doubles the available bandwidth when compared to the latest Vermeer models.
This is a remnant of how the Cezanne chip is built - all cores have complete bi-directional access to 16MB of L3 cache. Vermeer holds double the L3 on a core-and-thread basis, of course, so it's still arguably a better design, yet we feel as if Cezanne is better balanced.
