Running memory at the processors' supported speeds shows the Ryzen 3000-series generally do well, primarily because they should be populated with DDR4-3200 memory.
The obvious caveat to this is the substandard write performance for the Ryzen 7 3700X, which is about half that of the Ryzen 9 3900X and way lower than last-generation 2700X. So what gives? The answer has to do with architecture choices we mentioned on the first page. You may remember that each CCD complex is connected to the single cIOD hub via Infinity Fabric that reads at 32 bytes per cycle but only write at 16. This is why a single CCD, comprising up to eight cores, and present on the Ryzen 7 3700X, scores about half of what one would expect.
Ryzen 9 3900X doesn't have this issue because it uses two CCDs, and is therefore able to match the 32 write bytes, per clock, of the memory controller. AMD maintains that while the half-speed follows on from a direct choice in architecture, real-world applications are largely insensitive to it.
We also wondered about the latency aspect when connecting CCDs and the cIOD via that high-bandwidth Infinity Fabric. One would expect such an approach to add at least a few cycles of latency when accessing system memory because there is an extra step to go through.
The numbers show that operating a chiplet design isn't so damaging for AMD, because latency is not much worse than the previous generation where everything was on-die. That and the massive amount of cache supporting the cores.