Intel Corporation today announced the delivery of enabling programs and new product plans aimed at accelerating development and delivery of PCI Express* technology across computing and communications platforms.

Intel revealed its plans to incorporate PCI Express into products starting in 2004, including next generation enterprise, desktop and mobile chipsets and platforms, network processors, fully featured I/O processors for high-performance RAID, Ethernet components, Ethernet adapters, storage subsystems, and server boards and platforms.

Additionally, Intel announced plans to open a PCI Express Interoperability Lab and publish a Web-based PCI Express Solutions Catalog. The lab will be open to the industry by June of this year for first interoperability testing of PCI Express products with Intel processors, chipsets, and platforms. The PCI Express Solutions Catalog, hosted on the Intel Developer Network for PCI Express technology, offers a Web-based venue for leading vendors to provide information on their PCI Express tools, products and designs to other Intel Developer Network members. The Intel Developer Network is open to the industry and an excellent tool for developers for PCI Express development.

“Development around PCI Express technology is gaining broad-based momentum across desktop, notebook, enterprise, and communications platforms,” said Louis Burns, vice president and co-general manager, Intel Desktop Platforms Group. “Intel is focusing its work with the industry on delivering time-to-market PCI Express solutions in line with platform delivery in 2004. The Interoperability Lab and the Intel Developer Network’s Solution Catalog provides a comprehensive industry enabling effort to match the needs of leading developers in all market segments.”

PCI Express technology is one of the focus areas at the Intel Developer Forum, Spring 2003 being held this week. With a comprehensive technical track of classes, a 15-vendor community showcase featuring the latest in PCI Express product development, a hands-on PCI Express lab, a panel, and press/analyst briefings, conference attendees are getting a comprehensive education on this emerging I/O technology and its development progress since specification ratification in July 2002.

The PCI Express architecture is a high-speed, general-purpose, serial I/O interconnect that provides a unifying standard, consolidating the number of I/O interconnects within a platform. With the demands of emerging computing models exceeding the capabilities of the traditional PCI bus and platform capabilities, such as 10 GHz+ CPU speeds, faster memory, higher-speed 3D graphics, one Gigabit and 10 Gigabit Ethernet, broadband and multimedia, and the enterprise serial interconnect transition, there is a need for much greater internal system bandwidth and rich feature set for the next decade. The specification was approved and published in July 2002 by the PCI-SIG, which owns the industry promotion, support and maintenance.

For more information about the lab, the Solutions Catalog and other Intel enabling programs, visit the Intel Developer Network Web site at http://developer.intel.com/technology/pciexpress/devnet/.



About IDF

The Intel Developer Forum is the technology industry's premier event for hardware and software developers. Held worldwide throughout the year, IDF brings together key industry players to discuss cutting-edge technology and products for PCs, servers, communications equipment, and handheld clients. For more information on IDF and Intel technology, visit http://developer.intel.com.

Intel, the world’s largest chip maker, is also a leading manufacturer of computer, networking and communications products. Additional information about Intel is available at http://www.intel.com/pressroom.