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Review: NVIDIA's GeForce 6600 GT AGP

by Ryszard Sommefeldt on 16 November 2004, 00:00

Tags: NVIDIA (NASDAQ:NVDA)

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NV43

NV43 NV40
Process 110nm @ TSMC 130nm @ IBM
Transistor Count 143M 222M
Geometry Pipeline VS3.0 VS3.0
Fragment Processor PS3.0 PS3.0
Fragment Processor Setup 2 full ALU (not equal) each with 1 mini ALU, Fog ALU, per pipe 2 full ALU (not equal) each with 1 mini ALU, Fog ALU, per pipe
Fragment Processor Precision FP32, FP16 FP32, FP16
Traditional Render Setup 8 x 1 16 x 1
ROPs 4 16
Vertex Shaders 3 6
Basic Texture Filtering Bilinear Bilinear
Texture Filtering Bilinear, Trilinear, 16X Anisotropic Bilinear, Trilinear, 16X Anisotropic
Antialiasing Multi-sampling and super-sampling Multi-sampling and super-sampling
AA Sample Type Rotated grid up to 8X with supersampling combined at 8X Rotated grid up to 8X with supersampling combined at 8X
Native Bus Support PEG16X AGP8X
Memory support GDDR3 GDDR3
Basic Core Frequency 500MHz 400MHz
Basic Memory Frequency 1000MHz 1100MHz
Memory Bus Width 128-bit, memory crossbar 256-bit, memory crossbar
Basic Pixel Fillrate 4000Mpixel/sec 6400Mpixel/sec
Basic Multitexture Fillrate 4000Mtexel/sec 6400Mtexel/sec
Basic Memory Bandwidth ~16.0GB/sec ~35.2GB/sec

That's all explained in my initial review of NV43 and 6600 GT on PCI Express, so here's the bytesize version.

The CPU feeds the GPU geometry data via the driver, be that in the form of vertex programs or data via the fixed function geometry pipeline, which is transformed into pixel fragments. The fragment shader pipeline then operates on the fragments, dispatched by the driver and the GPU's fragment and instruction scheduler, using fragment shader programs that create render output. Finished pixel fragments are passed into the fragment crossbar, after possibly being multipassed through the shader pipeline, where they're dispatched to the ROP units.

A FIFO buffer sits in front of the ROP units, buffering pixel fragments into them. This is due to NV43 having half as many ROP units as possible output fragments. The fragment pipes combined can spit out eight fragments per clock at their peak, but there are only four ROPs after that stage to deal with them. The reasons for that are multiple, and explained in the initial article.

The ROPs then deal with any anti-aliasing, buffer combination and final colour ops before outputting the final pixels to the back buffer. That's then swapped to the front buffer for display on your screen. Repeat as many times as is needed for the desired output.

With the AGP product, the native bus is PEG16X, but obviously bridged, ready for operation on an AGP8X system.

Let's look at the reference board.