X58 chipset
Intel's move to an integrated tri-channel memory-controller and QPI link(s) for Core i7 is enough to require a new chipset to support the processor, clearly. Say goodbye to X48 and hello to X58 Express. Let's lay it out in logical block-diagram form:
A few of Core i7's differences are immediately apparent when looking at the block diagram.
Gobs of bandwidth
Tri-channel memory is fed directly to the integrated memory-controller on the CPU, up to 25.6GB/s for three DDR3 modules operating at 1,066MHz speeds - the fastest officially supported at launch. Compared to Core 2's front-side bus this is a far more elegant approach, leveraging considerably more bandwidth than was available via the constrained FSB pipe. Remember, even a 1,600MHz QX9770 was only able to pump some 12.8GB/s from main memory to CPU.
The northbridge, now bereft of doing any memory-related work, is renamed from MCH (memory-controller hub) to IOH (input/output hub) and it's connected to the CPU(s) via the QuickPath interconnect we've spoken about on previous pages, working at a maximum 25.6GB/s for the Core i7 940 and 965 EE processors.
Graphics-card lane arrangement
Whilst devilishly fast, QPI won't replace PCIe as the standard I/O interface for graphics cards anytime soon, and that's why a total of 36 lanes hang off the X58 IOH, compared to X48's 32. Motherboard manufacturers can choose to apportion these lanes in an eclectic manner - ranging between slots and speeds - but the chipset mandates that four PCIe connectors be supported with lane arrangement of either 1x16 (16 lanes), 2x16 (32 lanes), 4x8 (32 lanes), 1x16 and 2x8 (32 lanes). What this means is that up-to four graphics card will be supported, albeit at reduced speeds.
One can mix and match the outputs from the various ports. Note, too, port 2's allocation is for graphics and not peripherals; they're connected to the southbridge.
