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Now I mentioned dual processors earlier and in the Pentium 4 arena that means Xeons. You may think Xeon is a server product and that's true, certain incarnations of it are squarely aimed at the server space. But E7505 and GCWS both support Xeon DP's with only 512KB of L2 cache memory making them functionally little different from a regular Pentium 4 and very different from the large cache Xeon MP's for the server space.
So what does E7505 consist of?
* Intel® E7505 Memory Controller Hub (MCH)
* Intel® 82870P2 64-bit PCI/PCI-X Controller Hub 2
* Intel® 82801DB I/0 Controller Hub
The MCH is a 1005 pin behemoth of a bridge integrating a large array of features onto the millipede-legged FC-PGA package. The MCH (or northbridge in usual parlance) is center stage in the grand i7505 scheme of things. It's responsible for the 400 or 533MHz CPU system bus (single bus shared by both processors) which gives the processors up to ~4.2GB/sec of CPU I/O bandwidth (533MHz frequency moving 8-bytes/64-bits per clock). That then interfaces to the direct attached AGP8X controller giving a dedicated ~2.1GB/sec feed to your high end graphics card. Finally the MCH gives a lot of silicon space to dual, low latency, DDR memory controllers. DDR266 is the maximum supported specification, precisely feeding the rest of the controller ~4.2GB/sec of system memory bandwidth and up to 12GB total system memory.
E7505 also performs a combination of techniques on the memory controllers and installed memory modules to provide better reliability than your common or garden memory controller on something like the i845PE. ECC error correction is standard on this class of products and the E7505 bridge also does 4-bit detection and correction on a single bank or 8-bit detection and correction with two bank operation. This means that the bridge catches memory read/write failures before the data hits the memory bus on its way to the CPU and ensures data integrity, something that isn't always possible on lower end consumer hardware. This also means that parts of the memory subsystem can fail and the E7505 can continue working with what's available with (presumably) a combination of MCE (machine check exceptions, codes generated by the processor in the event of the problem) and NMI (non maskable interrupts that the processor must handle) on the processor used to alert the host operating system of failures so that the systems administrator can schedule replacements.
Peripheral I/O is taken care of by a pair of chips, the most interesting of which is the 82870P2 PCI/PCI-X controller. Regular I/O you'll all know about but PCI-X is more than likely unfamiliar territory for most. The 82870P2 is a 567-pin FC-PGA package with a pair of full speed (up to 133MHz) 64-bit PCI-X 'segments', each capable of branching off into a number of different PCI configurations supporting regular 32-bit, 33MHz PCI busses as well as more high end PCI-X busses capable of supporting Gigabit Ethernet and other high-bandwidth devices like multi-channel RAID and disk controllers.
PCI-X as a technology can be found at the PCI-SIG and you can find out about the current PCI-X standard as supported by the 82870P2 and other PCI-X bridges, along with up and coming PCI-X 2.3 and related PCI Express technologies that while still the preserve of high end homes like E7505 and GCWS, will eventually be a staple part of your future desktop systems.
Current PCI-X 133, the 133 standing for 133 million bus transactions per second, is a 1GB/sec extension to the regular PCI standard. Future PCI-X standards will incorperate ECC error checking over most of the stages of a PCI bus transaction meaning more reliable data transfer between PCI-X bridges, busses and the devices that sit on them. You'll also see 4.3GB/sec of peripheral I/O from PCI-X 533 making it a decent choice for future high speed I/O and a factor of 2 ahead of the fastest consumer I/O bus, AGP8X (itself a PCI hybrid).
Finally, after all that PCI-X excitement, you have the meat and potatoes of any current Pentium 4 solution, the 82801DB I/0 Controller Hub, more fondly known as the ICH4 southbridge. While the ICH4 will soon be displaced by the arrival of the ICH5 and ICH5-R bridges which arrived with Canterwood, it's still a highly competitive peripheral I/O solution with support for USB2.0, a 100MByte/sec Ethernet MAC, a 16-bit audio backend with AC'97 front end to a PHY, the regular PCI bus and the gamut of extra I/O such as serial ports and features like WOL.
So 3 bits of core silicon to power any given E7505 workstation solution. High speed, high end support for the latest Xeon processors (including the all conquering 3.0 and 3.06 versions), dual memory controllers with 4.2GB/sec of I/O and an AGP8X bus for high end graphics support.
All in all, by virtue of specifiying a pair of processors in true SMP fashion (as well as any HyperThreading you want to throw into the mix since Xeon has supported it for a long time) and the mandatory inclusion of the high end 82870P2 PCI-X bridge, E7505 stands out as Intel's current Pentium 4 crowning glory. Arguably even more impressive technically than a Canterwood solution, it's a high target for ServerWorks to aim at.
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