IBM, Samsung, and Global Foundries have been working together to develop an industry-first process that will enable 5nm chip making. The IBM-led research alliance says that 5nm chips packing 30 billion transistors will be as small as your fingernail. Unfortunately the 'Nanosheet' technology manufacturing process hasn't been fully detailed; we will have to wait until the 2017 Symposia on VLSI Technology and Circuits conference in Kyoto, Japan for that.
IBM scientists at the SUNY Polytechnic Institute Colleges of Nanoscale Science and Engineering’s NanoTech Complex in Albany, NY prepare test wafers with 5nm silicon nanosheet transistors, loaded into the front opening unified pod, or FOUPs, to test an industry-first process of building 5nm transistors using silicon nanosheets.
In an overview of the Nanosheet chip fabrication technology, the IBM blog explained that it has been using "stacks of silicon nanosheets as the device structure of the transistor, instead of the standard FinFET architecture, which is the blueprint for the semiconductor industry up through 7nm node technology". The process still uses EUV lithography, but beats the 7nm FinFET test node offering 20 billion transistors by packing up to 30 billion transistors in the same area.
A scan of IBM Research Alliance’s 5nm transistor, built using an industry-first process to stack silicon nanosheets as the device structure – achieving a scale of 30 billion switches on a fingernail-sized chip
You should not be surprised by an IBM-led alliance making this breakthrough as Arvind Krishna, SVP Hybrid Cloud and director at IBM Research, reminds us that "IBM aggressively pursues new and different architectures and materials that push the limits of this industry, and brings them to market in technologies like mainframes and our cognitive systems." In some background information to the development, we are told that IBM has been exploring nanosheet semiconductor technology for more than 10 years.
IBM Research scientist Nicolas Loubet holds a wafer of chips with 5nm silicon nanosheet transistors
manufactured using an industry-first process
We are still waiting for 7nm FinFET chips to hit the market and that is perhaps why IBM compared the new 5nm Nanosheet chips with 10nm technology. Compared to leading edge 10nm chips the nanosheet-based 5nm technology "can deliver 40 per cent performance enhancement at fixed power, or 75 per cent power savings at matched performance," claims IBM.
