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AMD Ryzen die shot and other slides from ISSCC emerge

by Mark Tyson on 17 February 2017, 11:01

Tags: AMD (NYSE:AMD)

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AMD Ryzen is a really hot topic in technology right now, with the anticipation that AMD will be pulling something very special out of the bag in under a fortnight from today. More clues to the power of the CPUs that might arrive shortly are provided by some newly uncovered slides, said to be from AMD's presentation deck at ISSCC earlier this month. Hot Hardware has written up a summary of its thoughts given the slide deck, which it says was leaked by a Japanese language source by the name of PC Watch.

The leaked slides include a pair of colour enhanced photomicrographs of the Ryzen CPU die. The die shots are labelled to help you make sense of what you can see. Above is the Ryzen floating point and integer engine, for example. AMD has previously talked about its super smart branch prediction to minimise command pipeline stalling. You can see this CPU component upper left.

Above you can see a shot of four Zen cores and the communication paths wbetween these and with the L3 cache.

Interestingly Hot Hardware discusses the comparison between AMD GlobalFoundries 14nm FinFET and rival Intel's 14nm chips. Apparently Intel has managed to create denser chips but, as we have seen noted before, the cluster size of AMD Zen cores is smaller, implying AMD has a lower design complexity requiring fewer transistors.

Higher single threaded performance comes as a result of AMD moving to a more traditional SMT design due to its single larger integer cluster, explains Hot Hardware.

Last but not least, a Precision Boost slide provides more info about this frequency control feature. This tech works alongside AMD Pure Power tech which monitors temperatures, frequencies, and voltage, to provide optimum boost levels at any given time.



HEXUS Forums :: 6 Comments

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So I suppose people will now be attempting to define the character of XFR? It will have its own personality, being aggressive on clocks or passive. Overclockers the world over will get competitive with it, trying to return better results manually.

Offers up a few questions, though. Will it have upper clock limits? How fast can it decide what the best boost is? If recording temperature change over time is the method for deciding cooling reliability, I can't imagine it boosting up very quickly.
Ozaron
Offers up a few questions, though. Will it have upper clock limits? How fast can it decide what the best boost is? If recording temperature change over time is the method for deciding cooling reliability, I can't imagine it boosting up very quickly.

IIRC from the presentation in December, Lisa Su said “If you have the cooling capacity, it will keep clocking up”. This implies it may not have a headroom and it's theoretical headroom will be the high frequency instability which can be mitigated with smart branch prediction to prevent interlocks and run away scenarios…soooo in short, maybe it doesn't have a theoretical headroom, but is limited by the stability of the transistors at high frequencies.
At a guess XFR will be like similar tech from Intel and Nvidia in that the upper limit will be set by voltage and/or temperatures, going on leaks (usual pinch of salt) there's going to be some form of utility for adjusting things.
There a benchmark on Guru3d
If the single core performance on those leaked benchmarks (on par with a i7-6850k) are to be believed, things might be about to get very interesting in the CPU market.