vacancies advertise contact news tip The Vault
GLOBAL CONTEST: Win a Samsung Galaxy S5 with Tech21! [x]
facebook rss twitter

NVIDIA debut EPP memory standard

by Ryszard Sommefeldt on 15 May 2006, 17:17

Tags: NVIDIA (NASDAQ:NVDA)

Quick Link: HEXUS.net/qafpw

Add to My Vault: x

NVIDIA team up with memory vendors to extend SPD concept

EPP and SLI Memory



NVIDIA are set to support an extension of the SPD ROM in memory modules in their upcoming core logic, teaming up with memory vendors to do so and submitting the new spec to JEDEC, the governing body for computing memory standards.

Part of the soon-to-come nForce5 and branded by NVIDIA as SLI Memory, EPP extends the SPD concept, where the memory module contains readable configuration information so the memory controller can better work with it.

Whereas the SPD stores basic timing parameters and rated speeds, EPP goes some steps further, using the SPD ROM storage space and hijacking a 160 byte range in the ROM to store extra information. That information will include operating voltage, even more timing parameters and, most importantly for NVIDIA, what amounts to overclocking information.

With nForce5 tied to AMD's forthcoming Socket AM2 platform shift, which endows new 940-pin AMD processors with a DDR2 memory controller that supports DDR2-800 as an AMD-approved maximum speed, EPP will allow nForce5 to run EPP-supporting modules at faster than their rated speed, and faster than the DDR2-800 maximum officially supported by the CPU.

Effectively the module will say, "hey, while outwardly I'm DDR2-XX memory at this voltage and these timing parameters, if you overvolt a bit and relax these settings, I'll go even faster, and I fully support you configuring me to do so".

And yes, the overclocker has been investigating those limits and settings since overclocking began, but the difference is now the core logic, CPU and DDR2 DIMMs are all in on it and do the hard work for you, extending the simple data in the SPD ROM to do so.

A simple BIOS toggle is presented when the core logic reads the EPP space and finds correct information, allowing you to run at new 'SLI Memory' speeds on nForce5. If you remember what SLI stands for -- Scaleable Link Interface -- you can see how the acronym applies to pretty much any clocked interface in the system. We won't give the game away today, but look out for that theme occurring pretty much everywhere with nForce5 upon launch.

Therefore, with the right hardware, you end up with a factory approved and warranted, easy-to-use, overclock for your memory subsystem with nForce5 and EPP DIMMs.

The first manufacturer out of the blocks with EPP-supporting memory for use with nForce5 and enabling the SLI Memory feature is Corsair. Their PC2-8500 TwinX kits support EPP, as will all their DDR2 memory in the future.

As for other vendors, NVIDIA claim support from at least OCZ and Kingston, who'll ship their own EPP-supporting sticks in due course, and NVIDIA and Corsair will present EPP as a spec to JEDEC at a meeting of the body in the near future.

NVIDIA and Corsair fully expect JEDEC to green light EPP as an official standard with other core logic announcing support for EPP in due course.

As mentioned, SLI Memory is just one facet of nForce5 that deals with pushing an accepted clock beyond 'official' limits, and while NVIDIA are reluctant to call it overclocking, since it's done entirely by the system itself with full guarantees it'll work, without voiding any warranty, it's essentially what's happening.

As for the seasoned tweaker who wants to push things even further, nForce5 doesn't stop you doing so with Socket AM2 processors, and that's coming from your author's personal experience. A very nice helping hand, though, don't you think?

We certainly do. Look out for more coverage of EPP and SLI Memory on HEXUS.core in the coming weeks, as we evaluate nForce5 and Socket AM2 in the run up to Computex.


HEXUS Forums :: 10 Comments

Login with Forum Account

Don't have an account? Register today!
Woah; I see the most important factor is left out of your write up? Price! What premium are these units going to carry?

This seems like another shift down the path of high-end niche products to me; the rationalisation of the market to eliminate all the variables that previously, the merry geek would try out for himself. My case of Chrometoramophobia [bbspot.com] just got even worse...
Well - EPP should not add any premium - its the same cost as the SPD being programmed.

So; compare 2 parts - one with and one without.

Twin2x2048-6400 to Twin2x2048-6400C4

Since they are based on spin-binned IC's - the memory is different - latencies et al, so at retail you will see a $10 to $20 difference.
This seems like another shift down the path of high-end niche products to me; the rationalisation of the market to eliminate all the variables that previously, the merry geek would try out for himself. My case of Chrometoramophobia just got even worse...

Eh? Its a bonus feature not a need feature - if you have X and Y you get Z - but if you don't have both X and Y they work in their own right too
Well, I just see it as another extravagance, really, I suppose. My philosophy is to get the cheapest and overclock, as opposed to spending a premium for these top end products and having them overclock themselves. But, yea fair enough, there'll be plenty of takers for these, just like RAM with lights on and with insane speed ratings.
It's not a new product as such, more an enhancement to memory modules. It simply adds a kind of 'BIOS' to the memory sticks with loads of info about their capabilities. A must have for all overclockers out there :)

I don't reckon any price hike will be seen at all.